1 (***********************************************************************)
5 (* Kim Nguyen, LRI UMR8623 *)
6 (* Université Paris-Sud & CNRS *)
8 (* Copyright 2010-2013 Université Paris-Sud and Centre National de la *)
9 (* Recherche Scientifique. All rights reserved. This file is *)
10 (* distributed under the terms of the GNU Lesser General Public *)
11 (* License, with the special exception on linking described in file *)
14 (***********************************************************************)
17 Time-stamp: <Last modified on 2013-03-08 16:25:12 CET by Kim Nguyen>
24 module Make (T : Tree.Sig.S) = struct
26 type cache = (int, StateSet.t) Hashtbl.t
29 try Hashtbl.find c (T.preorder t n)
30 with Not_found -> StateSet.empty
32 let set c t n v = Hashtbl.replace c (T.preorder t n) v
34 let eval_trans l ctx acc =
35 List.fold_left (fun (acct, accs) ((q, phi) as trs) ->
36 if StateSet.mem q accs then (acct, accs) else
37 if Ata.SFormula.eval ctx phi then
38 (acct, StateSet.add q accs)
43 let top_down_run auto tree node cache i =
44 let redo = ref false in
45 let rec loop node is_left =
46 if node != T.nil then begin
47 let parent = T.parent tree node in
48 let fc = T.first_child tree node in
49 let ns = T.next_sibling tree node in
50 let states0 = get cache tree node in
51 let tag = T.tag tree node in
52 let trans0 = Ata.get_trans auto auto.Ata.states tag in
53 let parent_states = if parent == T.nil then auto.Ata.top_states else get cache tree parent in
54 let fc_states = if fc == T.nil then auto.Ata.bottom_states else get cache tree fc in
55 let ns_states = if ns == T.nil then auto.Ata.bottom_states else get cache tree ns in
56 let is_root = parent == T.nil in
59 Ata.make_ctx fc_states ns_states parent_states StateSet.empty states0 is_left is_root
61 Ata.make_ctx fc_states ns_states StateSet.empty parent_states states0 is_left is_root
63 eprintf "-- [Iteration % 4d] --\n node: %a\n context: %a\n%!"
64 i T.print_node node Ata.print_ctx ctx0;
65 List.iter (fun (q, phi) -> eprintf " %a -> %a\n" State.print q Ata.SFormula.print phi) trans0;
66 eprintf "----------------------\n%!";
67 let trans1, states1 = eval_trans trans0 ctx0 StateSet.empty in
68 if states1 != states0 then set cache tree node states1;
69 let () = loop fc true in
70 let ctx1 = {ctx0 with Ata.left = (get cache tree fc) ; Ata.epsilon = states1 } in
71 let trans2, states2 = eval_trans trans1 ctx1 states1 in
72 if states2 != states1 then set cache tree node states2;
73 let () = loop ns false in
74 let ctx2 = { ctx1 with Ata.right = (get cache tree ns); Ata.epsilon = states2 } in
75 let _, states3 = eval_trans trans2 ctx2 states2 in
76 if states3 != states2 then set cache tree node states3;
77 if states0 != states3 && (not !redo) then redo := true
83 let get_results auto tree node cache =
84 let rec loop node acc =
85 if node == T.nil then acc
87 let acc0 = loop (T.next_sibling tree node) acc in
88 let acc1 = loop (T.first_child tree node) acc0 in
90 if StateSet.intersect (get cache tree node) auto.Ata.selection_states then
97 let eval auto tree node =
98 let cache = Hashtbl.create 511 in
99 let redo = ref true in
102 redo := top_down_run auto tree node cache !iter;
105 get_results auto tree node cache